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Behavioural languages - Part 8: Standard SystemC Analog/Mixed-Signal Extensions Language Reference Manual
60.60 Standard published
IP-XACT, Standard Structure for Packaging, Integrating, and Reusing IP within Tool Flows
60.60 Standard published
Quality of Electronic and Software Intellectual Property Used in System and System on Chip (SoC) Designs
60.60 Standard published
Artificial Intelligence Exchange and Service Tie to All Test Environments (AI-ESTATE)
60.60 Standard published
Standard Test Interface Language (STIL) for Digital Test Vector Data
60.60 Standard published
Standard for Extensions to Standard Test Interface Language (STIL) for Semiconductor Design Environments
60.60 Standard published
Standard for Extensions to Standard Test Interface Language (STIL) for DC Level Specification
60.60 Standard published
Standard Testability Method for Embedded Core-based Integrated Circuits
60.60 Standard published
SystemVerilog - Unified Hardware Design, Specification, and Verification Language
60.60 Standard published
SystemVerilog - Part 2: Universal Verification Methodology Language Reference Manual
60.60 Standard published
Standard for the common test interface pin map configuration for high-density, single-tier electronics test requirements utilizing IEEE Std 1505™
60.60 Standard published