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IEC 60191-6-5:2001 ED1

Mechanical standardization of semiconductor devices - Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch ball grid array (FBGA) IEC 60191-6-5:2001 ED1

Publication date:   Aug 27, 2001

General information

60.60 Standard published   Aug 27, 2001

IEC

TC 47/SC 47D

International Standard

31.080.01   Semiconductor devices in general

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Scope

Provides common outline drawings and dimensions for all types of structures and composed materials of fine-pitch ball grid array the terminal pitch of which is less than or equal to 0,80 mm.

Life cycle

NOW

PUBLISHED
IEC 60191-6-5:2001 ED1
60.60 Standard published
Aug 27, 2001

REVISED BY

ABANDON
IEC 60191-6-5 ED2