Projects

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Mechanical standardization of semiconductor devices - Part 3: General rules for the preparation of outline drawings of integrated circuits

60.60 Standard published

CLC/SR 47D

Mechanical standardization of semiconductor devices - Part 6-10: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Dimensions of P-VSON

60.60 Standard published

CLC/SR 47D

Mechanical standardization of semiconductor devices - Part 6-1: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for gull-wing lead terminals

60.60 Standard published

CLC/SR 47D

Mechanical standardization of semiconductor devices - Part 6-12: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guidelines for fine-pitch land grid array (FLGA)

60.60 Standard published

CLC/SR 47D

Mechanical standardization of semiconductor devices - Part 6-13: Design guideline of open-top-type sockets for Fine-pitch Ball Grid Array (FBGA) and Fine-pitch Land Grid Array (FLGA)

60.60 Standard published

CLC/SR 47D

Mechanical standardization of semiconductor devices - Part 6-16: Glossary of semiconductor tests and burn-in sockets for BGA, LGA, FBGA and FLGA

60.60 Standard published

CLC/SR 47D

Mechanical standardization of semiconductor devices - Part 6-17: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for stacked packages - Fine-pitch ball grid array and fine-pitch land grid array (P-PFBGA and P-PFLGA)

60.60 Standard published

CLC/SR 47D

Mechanical standardization of semiconductor devices - Part 6-18: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for ball grid array (BGA)

60.60 Standard published

CLC/SR 47D

Mechanical standardization of semiconductor devices - Part 6-19: Measurement methods of the package warpage at elevated temperature and the maximum permissible warpage

60.60 Standard published

CLC/SR 47D

Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages

60.60 Standard published

CLC/SR 47D

Mechanical standardization of semiconductor devices - Part 6-20: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of small outline J-lead packages (SOJ)

60.60 Standard published

CLC/SR 47D

Mechanical standardization of semiconductor devices - Part 6-21: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of small outline packages (SOP)

60.60 Standard published

CLC/SR 47D

Mechanical standardization of semiconductor devices - Part 6-2: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for 1,50 mm, 1,27 mm and 1,00 mm pitch ball and column terminal packages

60.60 Standard published

CLC/SR 47D

Mechanical standardization of semiconductor devices - Part 6-22: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for semiconductor packages Silicon Fine-pitch Ball Grid Array and Silicon Fine-pitch Land Grid Array (S-FBGA and S-FLGA)

60.60 Standard published

CLC/SR 47D

Mechanical standardization of semiconductor devices - Part 6-3: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of quad flat packs (QFP)

60.60 Standard published

CLC/SR 47D

Mechanical standardization of semiconductor devices - Part 6-4: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of ball grid array (BGA)

60.60 Standard published

CLC/SR 47D

Mechanical standardization of semiconductor devices - Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch ball grid array (FBGA)

60.60 Standard published

CLC/SR 47D

Mechanical standardization of semiconductor devices - Part 6-6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine pitch land grid array (FLGA)

60.60 Standard published

CLC/SR 47D