EN IEC 60191-1:2018

Mechanical standardization of semiconductor devices - Part 1: General rules for the preparation of outline drawings of discrete devices EN IEC 60191-1:2018

Publication date:   Jul 16, 2018

General information

60.60   Standard published   Mar 30, 2018

CENELEC

CLC/TC 47X

European Norm

31.080.01   Semiconductor devices in general

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Scope

IEC 60191-1:2018(E) gives guidelines on the preparation of outline drawings of discrete devices<span lang="EN-US">, including discrete surface-mounted semiconductor devices with lead count less than 8</span>.

This edition includes the following significant technical changes with respect to the previous edition:

a) the Scope has been extended to include surface-mounted semiconductor devices with a lead count less than 8;

b) a definition of the term "stand-off" has been added;

c) the methods for locating the datum have been extended to be suitable for SMD-packages;

d) the visual identification of terminal position one for automatic handling has been clarified;

e) the rules for the drawing of terminals have been clarified;

f) Table A.1 has been completed with symbols specifically for SMD-packages;

g) Annex B "Standardization philosophy" has been deleted;

h) a normative Annex with special rules for SMD-packages has been added;

i) the examples of semiconductor device drawings have been aligned to state-of-the-art packages including SMD-packages.
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Life cycle

PREVIOUSLY

WITHDRAWN
EN 60191-1:2007

NOW

PUBLISHED
EN IEC 60191-1:2018
60.60 Standard published
Mar 30, 2018




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