ISO/IEC 14575:2000 ED1

Information technology - Microprocessor systems - Heterogeneous InterConnect (HIC) (Low-Cost, Low-Latency Scalable Serial Interconnect for Parallel System Construction) ISO/IEC 14575:2000 ED1

Publication date:   Jul 11, 2000

General information

60.60   Standard published   Jul 11, 2000

IEC

ISO/IEC JTC 1/SC 25

International Standard

35.160   Microprocessor systems

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Scope

The construction of high-performance systems with parallel communications, parallel processing, and/or parallel I/O demands a fast, low-cost, low-latency interconnect. It must be fast and low-latency, otherwise it will be the limiting factor in system performance; and it must be low-cost, or it will dominate the system cost. This standard has been developed to complement recent technical developments of highly integrated, low-power interconnect technology implemented in high-volume commodity VLSI processes, and to exploit the simplifications in encodings and protocols resulting from the use of relatively reliable media over relatively short distances.

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PUBLISHED
ISO/IEC 14575:2000 ED1
60.60 Standard published
Jul 11, 2000




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