IEC 63275-1:2022 gives a test method to evaluate gate threshold voltage shift of silicon carbide (SiC) power metal-oxide-semiconductor field-effect transistors (MOSFETs) using room temperature readout after applying continuous positive gate-source voltage stress at elevated temperature. The proposed method accepts a certain amount of recovery by allowing large delay times between stress and measurement (up to 10 h).
PUBLISHED
IEC 63275-1:2022 ED1
60.60
Standard published
Apr 21, 2022