FprEN IEC 63011-3:2018

Integrated circuits - Three dimensional integrated circuits - Part 3: Model and measurement conditions of through-silicon via

General information

50.98   Project deleted   Sep 11, 2018

CENELEC

CLC/SR 47A Integrated circuits

European Norm

Scope

IEC 63011-3:2018 specifies a reference model of through-silicon via (TSV) electrical characteristics required for an interface design in three dimensional integrated circuit (3-D IC) to transmit and receive digital data and measurement conditions for resistance and capacitance to specify TSV characteristics in 3-D IC.

Power devices, RF devices and micro-electromechanical systems (MEMS) are not in the scope of this document.

Life cycle

NOW

ABANDON
FprEN IEC 63011-3:2018
50.98 Project deleted
Sep 11, 2018