EN IEC 63378-6:2026

Thermal standardization on semiconductor packages - Part 6: Thermal resistance and capacitance model for transient temperature prediction at junction and measurement points

Publication date:   May 18, 2026

General information

60.60   Standard published   Mar 20, 2026

CENELEC

CLC/TC 47X

European Norm

31.080.01   Semiconductor devices in general

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Scope

IEC 63378-6:2026 specifies a thermal resistance and capacitance model for semiconductor packages. This model is named the digital transformation using thermal resistance and capacitance (DXRC) model. It predicts transient temperature at junction and measurement points.

This document applies to semiconductor packages such as TO-252, TO-263, and HSOP. It supports single chip packages dissipated heat from single package surface.

Life cycle

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PUBLISHED
EN IEC 63378-6:2026
60.60 Standard published
Mar 20, 2026