0

IEC 60822:1988 ED1

VSB - Parallel Sub-system Bus of the IEC 60821 VMEbus IEC 60822:1988 ED1

Publication date:   Dec 30, 1988

General information

60.60 Standard published   Dec 30, 1988

IEC

ISO/IEC JTC 1/SC 25

International Standard

31.080.01   Semiconductor devices in general | 35.200   Interface and interconnection equipment | 35.160   Microprocessor systems

Buying

Published

Language in which you want to receive the document.

Scope

The VSB bus was designed to meet the needs of multiprocessor systems based on high-performance 32-bit microprocessors built up from board assemblies. lt includes a high-speed asynchronous data transfer bus allowing masters to direct the transfer of binary data to and from slaves according to 4 kinds of cycles: address-only, single-transfer, block-transfer and interrupt-acknowledge cycles. It also includes an arbitration bus enabling arbiter modules and/or requester modules to coordinate the use of the data-transfer bus according to two arbitration methods (series or parallel). Note: -For the price of this publication, please consult the ISO/IEC price-code list.

Life cycle

NOW

PUBLISHED
IEC 60822:1988 ED1
60.60 Standard published
Dec 30, 1988