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prENV 50XXX

prENV 50XXX

Electronic system specification languages - Extensions to VHDL'93 enhancement for analogue, and analogue-digital mixed-mode simulation

General information

Current stage: 30.98 Project deleted Jun 30, 1994

Originator: CENELEC

Owner: CLC/TC 217 Electronic Design Automation (EDA)

Type: Pre Standard

Life cycle

NOW

ABANDON
prENV 50XXX
30.98 Project deleted
Jun 30, 1994