ISO/TS 10303-1617:2006

Industrial automation systems and integration — Product data representation and exchange — Part 1617: Application module: AP210 interconnect design

Publication date:   Dec 13, 2006

Scope

ISO/TS 10303-1617:2006 specifies the application module for
AP210 interconnect design.




ISO/TS 10303-1617:2006 deals with the
representation of interconnect design.
This data provides functional and physical layout information sufficient to allow manufacture and
test of an interconnect. Design re-use is explicitly supported with traceability. Complete traceability
back to requirements is provided. Product connection requirements, shape requirements,
product specifications, process specifications, material specifications including manufacturing
view of stackup, geometric dimensioning and tolerancing are provided. This data identifies
those elements that do not meet design requirements. This data includes both design view
and usage view of the interconnect product. Support for specification of signal prioritization is
provided. Support for specifying the explicit network topology to be implemented is provided.
Configuration management information and design change management information is provided. This
data includes at least one geometric representation.



The following are within the scope of
ISO/TS 10303-1617:2006:



two dimensional layered interconnect substrate;configuration management data;design management data;three dimensional layered interconnect substrate;three dimensional molded interconnect substrate;material conductivity classification;as-routed connections;embedded components;test points;tolerance based cutout design;tolerance based cavity design;as-required connections;partially routed connections;pre-defined printed templates for design re-use;printed template definitions with terminals defined with a point on a surface;geometric properties for trace layout;geometric properties for pad taper layout;explicit definition of terminals of the interconnect substrate;explicit definition of cavities and cutouts of the interconnect substrate required for components;mapping between the explicit definition of terminals and internal design features.