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IEC 63011-3:2018 ED1

Integrated circuits - Three dimensional integrated circuits - Part 3: Model and measurement conditions of through-silicon via IEC 63011-3:2018 ED1

Publication date:   Nov 28, 2018

General information

60.60 Standard published   Nov 28, 2018

IEC

TC 47/SC 47A

International Standard

31.200   Integrated circuits. Microelectronics

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Scope

IEC 63011-3:2018 specifies a reference model of through-silicon via (TSV) electrical characteristics required for an interface design in three dimensional integrated circuit (3-D IC) to transmit and receive digital data and measurement conditions for resistance and capacitance to specify TSV characteristics in 3-D IC.
Power devices, RF devices and micro-electromechanical systems (MEMS) are not in the scope of this document.

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PUBLISHED
IEC 63011-3:2018 ED1
60.60 Standard published
Nov 28, 2018