60.60 Standard published Nov 6, 2020
CENELEC
CLC/SR 47A Integrated circuits
European Norm
31.200 Integrated circuits. Microelectronics
Published
IEC 62433-6:2020 describes the extraction flow for deriving an immunity macro-model of an Integrated Circuit (IC) against conducted Electrostatic Discharge (ESD) according to IEC 61000-4-2 and Electrical Fast Transients (EFT) according to IEC 61000-4-4.
The model addresses physical damages due to overvoltage, thermal damage and other failure modes. Functional failures can also be addressed. This model allows the immunity simulation of the IC in an application. This model is commonly called "Integrated Circuit Immunity Model Conducted Pulse Immunity", ICIM-CPI.
This document provides:
- the description of ICIM-CPI macro-model elements representing electrical, thermal or logical behaviour of the IC.
- a universal data exchange format based on XML.
PUBLISHED
EN IEC 62433-6:2020
60.60
Standard published
Nov 6, 2020
