Revised
IEC 61523-1:2012(E) focuses on delay and power calculation for integrated circuit design with support for modeling logical behavior and signal integrity. This second edition cancels and replaces the first edition, published in 2001, and constitutes a technical revision.
WITHDRAWN
IEC 61523-1:2001 ED1
WITHDRAWN
IEC 61523-1:2012 ED2
99.60
Withdrawal effective
Oct 11, 2023
PUBLISHED
IEC 61523-1:2023 ED3